1. Field of the Invention
This invention relates generally to the field of computer graphics and, more particularly, to systems configured for texture filtering and image processing operations.
2. Description of the Related Art
Texture filtering operations (such as bilinear and trilinear filtering) and image filtering operations (such as convolution and bicubic filtering) may be used in many graphics applications. Chip area on graphics processing devices is a very valuable commodity. Thus, a significant need exists for a mechanism of efficiently packing texture filtering and image processing operations into a limited chip area.
In one set of embodiments, a filter may be configured to perform arithmetic at different levels of precision, and to perform different functions depending on a current mode of operation. The filter may simultaneously process K operands (e.g. pixel components or texel components), where K varies depending on the complexity of the filtering operation to be performed in the current mode. Simpler filtering operations may allow larger values of K.
The filter may be configured (in a linear interpolation mode) to interpolate Mp pixels (e.g. the four pixel components R, G, B and xcex1 for Mp pixels) at N bits of precision per pixel component with an (N/2)-bit interpolation coefficient, where Mp is a positive integer. Each output pixel component may be computed from two corresponding input pixel components according to the relation:
out=in1*F+in2*(1xe2x88x92F),
where F is the (N/2)-bit interpolation coefficient.
For more complex filtering, the filter may be configured to perform double precision blending, where the blending fraction is N bits. This may be accomplished by merging two basic computational subunits together and combining their results. In this way, it is possible to perform double-precision arithmetic on half as many operands as in the linear interpolation mode. This double precision blending mode may be used for convolution and bicubic filtering where the filter coefficients are N-bit quantities, versus N/2 bits for normal teture mapping.
The filter may include a set of computation units organized as a tree structure. In one embodiment, the filter may be dynamically configured to process:
two pixels at once for bilinear filtering,
one pixel per cycle for trilinear filtering, or
multiple cycles per pixel for convolution or bicubic filtering.
The filter tree may automatically act in a multi-cycle mode where partial results are accumulated for convolution and bicubic filtering.
In this way, a single filter tree may perform texture processing and image processing functions, at varying precision levels, and with its resources utilized optimally or near optimally.